In plasma display devices, conductor arrays disposed on glass substrates are overcoated with a dielectric layer, and the glass plates sealed with the conductor arrays disposed orthogonal to each other, the conductor intersections defining display cells. By applying suitable drive signals selectively to the conductor arrays, the cells located at the intersection of the conductors are discharged, creating a visible display. The resulting wall charge, which occurs on the dielectric surface adjacent the cell area after discharge, produces a wall charge potential which opposes the discharge potential and combines with a sustain signal applied to all conductors to turn off the cells shortly after discharge and to discharge the cells on the next sustain iteration.
Heretofore, as in the aforereferenced co-pending application Ser. No. 372,384, the sustain signal is provided by a background circuit which is generally a high speed, high current, high voltage, low impedance device. The sustain signal is applied through a series of individual driver circuits to all lines of the panel, where it may be combined with a write or erase signal on a selected basis. From a technology and cost standpoint, it is desirable to package the drive circuitry and other electronics in integrated circuit packages or chips. Since all discharges in the display occur simultaneously, and since the device represents a capacitive load which is continuously charged and discharged, the circuit specifications for such devices are demanding. Integrated circuits are ideally suited for high density, low voltage, low power digital signal processing and integrating such parameters into an integrated circuit chip will produce the lowest cost and size for a given function. However, the specifications for high voltage, high current drivers or switching circuits in integrated circuits are extremely demanding and the devices, if available, are extremely expensive. Thus, the panel drive waveforms are generated by a combination of analog and digital components and of high power and low power segments which are normally incompatible, particularly for high density packaging in integrated or semiconductor technology.
As heretofore noted, the plasma display panel requires a high power transition drive circuit to charge and discharge what is essentially a capacitive load which is minimized if the panel lines are driven through the voltage transitions simultaneously, eliminating the impact of interactive capacitances. Upon completion of these voltage transitions, the plasma discharges, and very high currents are required to satisfy the transfer of wall charge necessary for panel operation. The panel is then driven in the opposite direction via a controlled transition to produce an AC waveform which may have a nominal value of 200 volts peak-to-peak, with a high current plasma discharge occurring at the opposite peak voltages. Such controlled voltage transitions require analog high power switching circuits, while the plasma discharges require low impedance, low power digital switches between the panel lines and the high voltage bulk power supply.
While creating the entire sustain waveform with a discrete background analog circuit would satisfy the high power transition requirements, the accumulative impedance from the background devices and distribution would not satisfy the low impedance discharge criteria. Creating the entire waveform with fully integrated drive circuits, on the other hand, would satisfy the low impedance plasma discharge requirements, but would also incorporate the high stress, high power analog switching requirements which would affect the density, yield and reliability capabilities of the integrated circuit.